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Ixiasoft
1.1. Device Family Support
1.2. Ports and Parameters
1.3. Installing and Licensing Intel® FPGA IP Cores
1.4. ASMI Parallel Intel® FPGA IP Core Operations and Timing Requirements
1.5. ASMI Parallel Intel® FPGA IP Core User Guide Archives
1.6. Document Revision History for ASMI Parallel Intel® FPGA IP Core User Guide
1.4.1. Read Memory Capacity ID from the EPCS/EPCQ/EPCQ-L/EPCQ-A Device
1.4.2. Read Silicon ID from the EPCS Device
1.4.3. Protect a Sector on the EPCS/EPCQ/EPCQ-L/EPCQ-A Device
1.4.4. Read Data from the EPCS/EPCQ/EPCQ-L/EPCQ-A Device
1.4.5. Fast Read Data from the EPCS/EPCQ/EPCQ-L/EPCQ-A Device
1.4.6. Write Data to the EPCS/EPCQ/EPCQ-L/EPCQ-A Device
1.4.7. Read Status Register of the EPCS/EPCQ/EPCQ-L/EPCQ-A Device
1.4.8. Erase Memory in a Specified Sector on the EPCS/EPCQ/EPCQ-L/EPCQ-A Device
1.4.9. Erase Memory in Bulk on the EPCS/EPCQ/EPCQ-L256/EPCQ-A Device
1.4.10. Erase Memory in a Specified Die on the EPCQ-L512 and EPCQ-L1024 Device
1.4.11. Enable 4-byte Addressing Operation for an EPCQ256/EPCQ-L256 or Larger Devices
1.4.12. 4-byte Addressing Exit Operation for an EPCQ256/EPCQ-L256 or Larger Devices
Visible to Intel only — GUID: sam1412044463397
Ixiasoft
1.1. Device Family Support
The ASMI Parallel Intel® FPGA IP core is available for all Intel® FPGA device families supported by the Intel® Quartus® Prime software except the MAX® series.