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1.1. Pins Status for Agilex™ 7 F-Series and I-Series Devices
1.2. Agilex™ 7 FPGA Core Pins
1.3. Agilex™ 7 E-Tile Pins
1.4. Agilex™ 7 P-Tile Pins
1.5. Agilex™ 7 F-Tile Pins
1.6. Agilex™ 7 R-Tile Pins
1.7. Agilex™ 7 Hard Processor System (HPS) Pins
1.8. Agilex™ 7 Power Supply Sharing Guidelines
1.9. Notes to Agilex™ 7 F-Series and I-Series Device Family Pin Connection Guidelines
1.10. Document Revision History for the Agilex™ 7 Device Family Pin Connection Guidelines: F-Series and I-Series
1.2.1. Clock and PLL Pins
1.2.2. Dedicated Configuration/JTAG Pins
1.2.3. Optional/Dual-Purpose Configuration Pins
1.2.4. Differential I/O Pins
1.2.5. External Memory Interface Pins
1.2.6. Voltage Sensor and Voltage Reference Pins
1.2.7. Remote Temperature Sensing Diode Pins
1.2.8. Reference Pins
1.2.9. No Connect and DNU Pins
1.2.10. Power Supply Pins
1.2.11. Secure Device Manager (SDM) Pins
1.2.12. Secure Device Manager (SDM) Optional Signal Pins
1.7.1. HPS Supply Pins
1.7.2. HPS Oscillator Clock Input Pin
1.7.3. HPS JTAG Pins
1.7.4. HPS GPIO Pins
1.7.5. HPS SDMMC Pins
1.7.6. HPS NAND Pins
1.7.7. HPS USB Pins
1.7.8. HPS EMAC Pins
1.7.9. HPS I2C_EMAC and MDIO Pins
1.7.10. HPS I2C Pins
1.7.11. HPS SPI Pins
1.7.12. HPS UART Pins
1.7.13. HPS Trace Pins
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1.8. Agilex™ 7 Power Supply Sharing Guidelines
Agilex™ 7 devices have specific power-up and power-down sequence requirements. For more information, refer to the Agilex™ 7 Power Management User Guide .
Note: Altera recommends you to generate a .pin file from the Quartus® Prime Fitter to verify power pin assignment. Altera also recommends using this .pin file to determine if it is safe to power down or ground certain power supplies for your specific design. This step informs you to make the appropriate design choices for unused power supplies for your design.
Section Content
Example 1— Agilex 7 Devices (P-Tile and E-Tile)
Example 2— Agilex 7 Devices (F-Tile and R-Tile)
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