L- and H-tile Avalon® Streaming and Single Root I/O Virtualization (SR-IOV) Intel® FPGA IP for PCI Express* User Guide

ID 683111
Date 3/07/2022
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

9.2. Test Driver Module

The test driver module, altpcie_<dev>_tbed_hwtcl.v, instantiates the top-level BFM, altpcietb_bfm_top_rp.v.

The top-level BFM completes the following tasks:

  1. Instantiates the driver and monitor.
  2. Instantiates the Root Port BFM.
  3. Instantiates either the PIPE or serial interfaces.

The configuration module, altpcietb_bfm_configure.v performs the following tasks:

  1. Configures assigns the BARs.
  2. Configures the Root Port and Endpoint.
  3. Displays comprehensive Configuration Space, BAR, MSI and MSI-X, AER, settings..