AN 773: Drive-On-Chip Design Example for Intel® MAX® 10 Devices

ID 683072
Date 7/26/2023
Public
Document Table of Contents

7.9.1.2. Generating VHDL for the DSP Builder for Intel FPGAs Models for the DC-DC Converter

  1. Start DSP Builder for Intel FPGAs.
  2. Change the directory to the ip\dspba\two_phase_dc_dc.
  3. If you want a different numeric precision, edit the setup_<Simulink Model>.m file corresponding to the model before opening it.
  4. Load the model.
  5. Check the status of the orange DSP Builder for Intel FPGAs folding block. If the model includes it, folding is enabled. If it is removed or commented out, the model does not use folding.
  6. Click Simulation > Start .
DSP Builder for Intel FPGAs generates the VHDL files in ip\dspba\two_phase_dc_dc\rtl.