AN 773: Drive-On-Chip Design Example for Intel® MAX® 10 Devices

ID 683072
Date 7/26/2023
Public
Document Table of Contents

7.3. DC Link Monitor

The Drive-On-Chip Design Example DC-link monitor uses an instance of the sinc3 filter module, similar to the instance that the sigma-delta interface for drive axes uses. Three DC link monitor modules monitor DC link input voltage, DC link input current, and DC link output current. All three modules reside in lvmc_dclink.qsys subsystem.

The design compares the software configurable reference values with the filtered DC-link voltage and current values to determine if the DC-link voltage and current are within the expected range. Status outputs indicate overvoltage, undervoltage, and overcurrent conditions.

The design feeds these status output signals to the DC-DC converter module and shuts down the DC link output when any abnormal state occurs.

ADC Interface Result

The DC link voltage restricts the demodulated result of the DC-link monitor to a positive value because the DC-link voltage cannot be negative. The design clips any negative result after applying the offset correction to zero. The DC link input current and output current clips the demodulated results to fit within 16 bits signed integer range.

Offset Adjustment for DC-Link Monitor

The design adds offset values to demodulator results. The design specifies offset values in the Offset register. During normal operation, the offset value is 16,384.