Visible to Intel only — GUID: nfa1438593149973
Ixiasoft
1. Quick Start Guide
2. 10M/100M/1G/10G Ethernet Design Example for Intel® Arria® 10 Devices
3. 1G/10G Ethernet Design Example for Intel® Arria® 10 Devices
4. 10GBASE-R Ethernet Design Example for Intel® Arria® 10 Devices
5. 1G/2.5G Ethernet Design Example for Intel® Arria® 10 Devices
6. 1G/2.5G/10G Ethernet Design Example for Intel® Arria® 10 Devices
7. 10M/100M/1G/2.5G/5G/10G (USXGMII) Ethernet Design Example for Intel® Arria® 10 Devices
8. Interface Signals Description
9. Configuration Registers Description
10. Low Latency Ethernet 10G MAC Intel® Arria® 10 FPGA IP Design Example User Guide Archives
11. Document Revision History for the Low Latency Ethernet 10G MAC Intel® Arria® 10 FPGA IP Design Example User Guide
Visible to Intel only — GUID: nfa1438593149973
Ixiasoft
1.3.1. Procedure
You can compile and simulate the design by running a simulation script from the command prompt.
- At the command prompt, change the working directory to <Example Design>\simulation\ed_sim\<Simulator> .
- Run the simulation script for the simulator of your choice.
-
Simulator Working Directory Command ModelSim® <Example Design>/simulation/ed_sim/mentor vsim -c -do tb_run.tcl VCS* <Example Design>/simulation/ed_sim/synopsys/vcs sh tb_run.sh Xcelium* 1 <Example Design>/simulation/ed_sim/xcelium sh tb_run.sh
A successful simulation ends with the following message:
Simulation stopped due to successful completion! Simulation passed.
After successful completion, you can analyze the results.