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1. Quick Start Guide
2. Detailed Description for Arria® 10 Serial Lite III Streaming Standard Clocking Mode
3. Detailed Description for Arria® 10 Serial Lite III Streaming Advanced Clocking Mode
4. Serial Lite III Streaming Arria® 10 FPGA IP Design Example User Guide Archives
5. Document Revision History for Serial Lite III Streaming Arria® 10 FPGA IP Design Example User Guide
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3.4.1. Testbench
If your design targets Arria® 10 devices, the generated example testbench is dynamic and has the same configuration as the IP.
Note: The Arria® 10 example testbench includes the external transceiver PLL; the IP core does not include the transceiver PLL for these devices.
Figure 23. Serial Lite III Streaming Example Testbench (Duplex) for Arria® 10 Devices
Figure 24. Serial Lite III Streaming Example Testbench (Simplex) for Arria® 10 Devices