Serial Lite III Streaming Arria® 10 FPGA IP Design Example User Guide

ID 683055
Date 5/23/2024
Public
Document Table of Contents

1.3.2. Design Example Parameters

The Serial Lite III Streaming IP parameter editor includes an Example Design tab for you to specify certain parameters before generating the design example.
Table 2.  Parameters in the Example Design Tab
Parameter Description
Select Design Available example designs for the IP parameter settings. When you select a design from the Preset library, this field shows the selected design.
Generate Files for

The files to generate for different development phases.

Simulation—when selected, the necessary files for simulating the design example are generated.

Synthesis—when selected, the synthesis files are generated. Use these files to compile the design in the Quartus Prime software for hardware testing.

Generate File Format The format of the RTL files for simulation—Verilog or VHDL.
Select Board Supported hardware for design implementation. When you select an Intel development board, the Target Device is the one that matches the device on the Development Kit.

If this menu is grayed out, there is no supported board for the options that you select.

Arria® 10 GX Transceiver Signal Integrity Development Kit: This option allows you to test the design example on selected Intel development kit. This selection automatically selects the Target Device to match the device on the Intel development kit. If your board revision has a different device grade, you can change the target device.

Custom Development Kit: This option allows you to test the design example on a third party development kit with Intel device, a custom designed board with Intel device, or a standard Intel development kit not available for selection. You can also select a custom device for the custom development kit.

No Development Kit: This option excludes the hardware aspects for the design example.

Change Target Device Select a different device grade for Intel development kit. For device-specific details, refer to the device datasheet on the Intel FPGA website.