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2.1. Arria® 10 DisplayPort SST Parallel Loopback Design Features
2.2. Arria® 10 DisplayPort MST Parallel Loopback Design Features
2.3. Enabling Adaptive Sync Support
2.4. Arria® 10 DisplayPort SST TX-only or RX-only Design Features
2.5. Design Components
2.6. Clocking Scheme
2.7. Interface Signals and Parameters
2.8. Hardware Setup
2.9. Simulation Testbench
2.10. DisplayPort Transceiver Reconfiguration Flow
2.11. Transceiver Lane Configurations
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Ixiasoft
1.5. Compiling and Testing the Design
- Ensure hardware example design generation is complete.
- Launch the Quartus® Prime software and open <project directory>/quartus/a10_dp_demo.qpf.
- Click Processing > Start Compilation.
- After successful compilation, the Quartus® Prime software generates a .sof file in your specified directory.
- Connect the DisplayPort RX connector on the Bitec daughter card to an external video source, such as the graphics card on a PC.
- Connect the DisplayPort TX connector on the Bitec daughter card to a video analyzer or a DisplayPort sink device, such as a PC monitor.
- Ensure all switches on the development board are in default position.
- Configure the selected Arria® 10 device on the development board using the generated .sof file (Tools > Programmer ).
- The DisplayPort sink device displays the video generated from the video source.