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Ixiasoft
1. Quick Start Guide
2. 10GBASE-R Ethernet Design Example
3. 10M/100M/1G/2.5G/10G Ethernet Design Example
4. 1G/2.5G Ethernet Design Example with IEEE 1588v2 Feature
5. 1G/2.5G/10G Ethernet Design Example with IEEE 1588v2 Feature
6. 10M/100M/1G/2.5G/5G/10G (USXGMII) Ethernet Design Example
7. Interface Signals Description
8. Configuration Registers Description
9. Low Latency Ethernet 10G MAC Intel® Stratix® 10 FPGA IP Design Example User Guide Archives
10. Document Revision History for the Low Latency Ethernet 10G MAC Intel® Stratix® 10 FPGA IP Design Example User Guide
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Ixiasoft
3.1. Features
- Supports dual Ethernet channel operating at 10M, 100M, 1G, 2.5G, and 10G using Intel® Stratix® 10 Multi-rate PHY.
- On the transmit and receive paths:
- Provides packet monitoring system.
- Reports Ethernet MAC statistics counter.
- Supports testing using different types of Ethernet packet transfer protocol.