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1. Quick Start Guide
2. 10GBASE-R Ethernet Design Example
3. 10M/100M/1G/2.5G/10G Ethernet Design Example
4. 1G/2.5G Ethernet Design Example with IEEE 1588v2 Feature
5. 1G/2.5G/10G Ethernet Design Example with IEEE 1588v2 Feature
6. 10M/100M/1G/2.5G/5G/10G (USXGMII) Ethernet Design Example
7. Interface Signals Description
8. Configuration Registers Description
9. Low Latency Ethernet 10G MAC Intel® Stratix® 10 FPGA IP Design Example User Guide Archives
10. Document Revision History for the Low Latency Ethernet 10G MAC Intel® Stratix® 10 FPGA IP Design Example User Guide
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2. 10GBASE-R Ethernet Design Example
The 10GBASE-R Ethernet design example demonstrates an Ethernet solution for Intel® Stratix® 10 devices using the LL 10GbE MAC Intel® FPGA IP, the native PHY IP, and a small form factor pluggable (SFP+) module.
Generate the design example from the Example Design tab of the LL 10GbE Intel® FPGA IP parameter editor.