Visible to Intel only — GUID: lij1600187944685
Ixiasoft
Visible to Intel only — GUID: lij1600187944685
Ixiasoft
6.1. Reset Signals
Signal | Description |
---|---|
Input Signals | |
i_rst_n | Active-low reset asynchronous signal. Do not deassert until the o_rst_ack_n deasserts.
This reset leads to assertion of the o_rst_ack_n output signal. |
i_tx_rst_n | Active-low reset asynchronous signal. Resets the entire TX datapath, including the TX PCS, TX MAC, TX PMA, and TX EMIB. Do not deassert until the o_rst_ack_n asserts. |
i_rx_rst_n | Active-low reset asynchronous signal. Resets the entire RX datapath, including the RX PCS, RX MAC, RX PMA, and RX EMIB. Do not deassert until the o_rst_ack_n asserts. |
i_reconfig_reset | Active-high reconfiguration reset signal. Reset the entire reconfiguration clock domain, including the soft registers (CSRs). You must assert this reset after power-on or during the configuration. The i_reconfig_clk must be stable before deasserting this reset. |
Output Signals | |
o_rst_ack_n | Active-low asynchronous acknowledgement signal for the i_rst_n reset. Do not deassert i_rst_n reset until the o_rst_ack_n asserts. |
o_tx_rst_ack_n | Active-low asynchronous acknowledgement signal for the i_tx_rst_n reset. Do not deassert i_tx_rst_n reset until the o_tx_rst_ack_n asserts. |
o_rx_rst_ack_n | Active-low asynchronous acknowledgement signal for the i_rx_rst_n reset. Do not deassert i_rx_rst_n reset until the o_rx_rst_ack_n asserts. |
Status Signals | |
o_tx_lanes_stable | Active-high asynchronous status signal for the TX datapath.
|
o_rx_pcs_ready | Active-high asynchronous status signal for the RX datapath.
|