AN 1011: TinyML Applications in Altera FPGAs Using LiteRT for Microcontrollers

ID 848984
Date 4/07/2025
Public
Document Table of Contents

3. Generating Nios® V Processor System

The general implementation of the Nios® V processor system has two parts: hardware design and software design. The hardware design, which comprises the Nios V processor and peripherals, is developed using the Quartus® Prime software.

Developing a Nios® V processor application requires a software design that complements the processor hardware design. You can develop a Nios® V processor software design using Ashling* RiscFree* IDE for Altera® FPGAs.