AN 1011: TinyML Applications in Altera FPGAs Using LiteRT for Microcontrollers

ID 848984
Date 4/07/2025
Public
Document Table of Contents

3.2. Building Software Design with Ashling* RiscFree* IDE for Altera® FPGAs

Note: Ensure you complete the steps in Preparing LiteRT Inference Model before continuing this chapter.
Once the processor system is ready, start building the software design using Ashling* RiscFree* IDE for Altera® FPGAs. Follow these steps:
  1. Create a Board Support Package (BSP) project.
  2. Build LiteRT for Microcontrollers static library.
  3. Create a Nios V application project with Hello World TinyML example source code.
  4. Import both projects into RiscFree IDE’s workspace.
  5. Build the Hello World application.

Altera recommends you create a similar directory tree in your design project to ensure a streamlined build flow. The following software design flow is based on this directory tree.

To create the software project directory tree:
  • In your design project folder, create a folder called software.
  • In the software folder, create two folders called app and bsp.
    Figure 11. Software Project Directory Tree
Table 3.   LiteRT for Microcontrollers Binaries at Prerequisite
Binaries Description
model_data.cc Model params stored within a C array.
model_data.h Header file of model_data.h.
model_settings.h List of classes to decode classification results in main.cc.
main.cc Main LiteRT application to setup LiteRT model, uploading images, classifying images and profiling.
Multiple figure.h Sample of MNIST images stored within a C array.