Cyclone® V SoC Development Kit User Guide

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ID 830285
Date 10/07/2024
Public
Document Table of Contents
Document Table of Contents x
1. Overview 2. Getting Started 3. Development Kit Setup 4. Board Update Portal 5. Board Test System 6. Document Revision History for the Cyclone® V SoC Development Kit User Guide A. Development Kit Components B. Additional Information
1. Overview x
1.1. Block Diagram 1.2. Feature Summary 1.3. Box Contents
2. Getting Started x
2.1. Before You Begin 2.2. Inspecting the Boards 2.3. Software and Driver Installation
2.3. Software and Driver Installation x
2.3.1. Installing the Quartus® Prime Standard Edition Software 2.3.2. Installing the Intel® SoC EDS 2.3.3. Installing the Development Kit 2.3.4. Installing the Intel® FPGA Download Cable II Driver
3. Development Kit Setup x
3.1. Setting Up the Development Kit 3.2. Factory Default Switch and Jumper Settings 3.3. Restoring the MAX® V CPLD to the Factory Setting 3.4. Restoring CFI Flash Device to the Factory Defaults
3.2. Factory Default Switch and Jumper Settings x
3.2.1. Restoring the Default Settings for Power Solution 2 Board 3.2.2. Restoring the Default Settings for Power Solution 1 Board
4. Board Update Portal x
4.1. Connecting to the Board Update Portal Web Page
5. Board Test System x
5.1. Preparing the Board for the Board Test System 5.2. Running the Board Test System 5.3. Using the Board Test System 5.4. The Power Monitor 5.5. The Clock Control 5.6. Configuring the FPGA Using the Quartus® Prime Programmer
5.3. Using the Board Test System x
5.3.1. The Configure Menu 5.3.2. The System Info Tab 5.3.3. The GPIO Tab 5.3.4. The I2C Tab 5.3.5. The DDR3 Tab 5.3.6. The SDI Video Tab 5.3.7. The HSMC Tab
5.6. Configuring the FPGA Using the Quartus® Prime Programmer x
5.6.1. Before Configuring 5.6.2. Configuring the FPGA
A. Development Kit Components x
A.1. Board Overview A.2. Programming Flash Memory A.3. Power
A.2. Programming Flash Memory x
A.2.1. CFI Flash Memory A.2.2. quad SPI Flash Memory A.2.3. SD Card Memory
A.2.1. CFI Flash Memory x
A.2.1.1. CFI Flash Memory Map A.2.1.2. Programming CFI Flash Using the Quartus® Prime Programmer A.2.1.3. Converting .sof Files to a .pof
A.2.2. quad SPI Flash Memory x
A.2.2.1. Programming quad SPI Flash Using the Quartus® Prime Programmer
A.2.3. SD Card Memory x
A.2.3.1. Programming the SD Card Boot Image
B. Additional Information x
B.1. Safety and Regulatory Information B.2. Compliance Information
B.1. Safety and Regulatory Information x
B.1.1. Safety Warnings B.1.2. Safety Cautions
1. Overview
2. Getting Started
3. Development Kit Setup
4. Board Update Portal
5. Board Test System
6. Document Revision History for the Cyclone® V SoC Development Kit User Guide
A. Development Kit Components
B. Additional Information

A.2.1.1. CFI Flash Memory Map

Table 13.  Byte Address Flash Memory MapThis table shows the default memory contents of the 512 Mb CFI flash device.
Address Range KB Size Block Description
0x0145.635C – 03FF.FFFF 44,711 Unused
0x00DA.0000 – 0145.635B 6,872 User hardware 2
0x006E.0000 – 00D9.635B 6,872 User hardware 1
0x0002.0000 – 006D.635B 6,872 Factory hardware
0x0001.8000 – 0001.8080 32 PFL option bits
CAUTION:
Altera recommends that you do not overwrite the factory hardware images unless you are an expert with Altera® tools. If you unintentionally overwrite the factory hardware or factory software image, refer to the Restoring the CFI Flash Device to the Factory Defaults section.
Related Information
Level Two Title