Triple-Speed Ethernet Intel® FPGA IP Design Example User Guide: Agilex™ 5 FPGAs and SoCs

ID 813899
Date 7/08/2024
Public

2.3. Functional Description

Figure 6. Block Diagram—10/100/1000Mb Ethernet MAC with 1000BASE-X/SGMII 2XTBI PCS with GTS Transceiver