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Ixiasoft
1. Introduction
2. FPGA Configuration First Mode
3. HPS Boot First Mode
4. Creating the Configuration Files
5. HPS Boot Flows
6. Configuring the FPGA Fabric from HPS Software
7. Debugging the Agilex™ 5 SoC FPGA Boot Flow
8. Document Revision History for the Hard Processor System Booting User Guide: Agilex™ 5 SoCs
4.1. Overview
4.2. Quartus® Prime Hardware Project Compilation
4.3. Bootloader Software Compilation
4.4. Programming File Generator
4.5. Configuration over JTAG
4.6. Configuration from QSPI
4.7. Configuration over AVST
4.8. Configuration via Protocol
4.9. Remote System Update
4.10. Partial Reconfiguration
Visible to Intel only — GUID: nlm1688590770450
Ixiasoft
6.1. Configuring the FPGA Fabric from U-Boot
For information about configuring the FPGA Fabric from U-Boot, refer to the Building Bootloader for Agilex™ 5 web page on RocketBoards.
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