Low Latency Ethernet 10G MAC Intel® FPGA IP Design Example User Guide: Agilex™ 5 FPGAs and SoCs

ID 813665
Date 7/08/2024
Public
Document Table of Contents

6.1. Features

  • Supports dual Ethernet channel operating at 10M, 100M, 1G, 2.5G, 5G, and 10G.
  • On the transmit and receive paths:
    • Provides packet monitoring system.
    • Reports Ethernet MAC statistics counter.
    • Reports packet timestamps for design examples with IEEE 1588v2 feature enabled.
  • Supports testing using different types of Ethernet packet transfer protocol.