Low Latency Ethernet 10G MAC Intel® FPGA IP Design Example User Guide: Agilex™ 5 FPGAs and SoCs

ID 813665
Date 10/07/2024
Public

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1.3.1. Procedure

You can compile and simulate the design by running a simulation script from the command prompt.
  1. At the command prompt, change the working directory to <Example Design>\simulation\ed_sim\<Simulator> .
  2. Run the following simulation scripts.
    Simulator Working Directory Command
    VCS* MX <Example Design>/simulation/ed_sim/synopsys/vcsmx

    For 10M/100M/1G, 2.5G, and 10G design example:

    sh tb_run.sh

    For 1G and 2.5G with IEEE 1588 design example: sh tb_run.sh

    For 10M/100M/1G/2.5G/5G/10G (USXGMII) design example:

    sh altera_tb_run.sh

    For 10M/100M/1G/2.5G/5G/10G (USXGMII) with IEEE 1588 design example:

    sh altera_tb_run.sh
    QuestaSim* <Example Design>/simulation/ed_sim/mentor

    For 10M/100M/1G, 2.5G, and 10G design example:

    vsim -c -do tb_run.tcl

    For 1G and 2.5G with IEEE 1588 design example: vsim -c -do tb_run.tcl

    For 10M/100M/1G/2.5G/5G/10G (USXGMII) design example:

    sh altera_tb_run.sh

    For 10M/100M/1G/2.5G/5G/10G (USXGMII) with IEEE 1588 design example:

    vsim -c -do altera_tb_run.tcl
    Xcelium* <Example Design>/simulation/ed_sim/xcelium

    For 10M/100M/1G, 2.5G, and 10G design example:

    sh tb_run.sh

    For 1G and 2.5G with IEEE 1588 design example:

    sh tb_run.sh

    For 10M/100M/1G/2.5G/5G/10G (USXGMII) design example:

    sh altera_tb_run.sh

    For 10M/100M/1G/2.5G/5G/10G (USXGMII) with IEEE 1588 design example:

    sh altera_tb_run.sh
    Riviera-PRO* <Example Design>/simulation/ed_sim/aldec

    For 10M/100M/1G, 2.5G and 10G design example: vsim -c -do tb_run.tcl

    For 10M/100M/1G/2.5G/5G/10G (USXGMII) design example : vsim -c -do altera_tb_run.tcl

    For 1G and 2.5G with IEEE 1588v2 design example : vsim -c -do tb_run.tcl

    For 10M/100M/1G/2.5G/5G/10G (USXGMII) with IEEE 1588v2 design example : vsim -c -do altera_tb_run.tcl

A successful simulation ends with the following message:
Simulation passed.
After successful completion, you can analyze the results.