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1. About the High Bandwidth Memory (HBM2E) Interface Intel Agilex® 7 FPGA IP User Guide
2. Introduction to High Bandwidth Memory
3. Intel Agilex® 7 M-Series HBM2E Architecture
4. Creating and Parameterizing the High Bandwidth Memory (HBM2E) Interface Intel® FPGA IP
5. High Bandwidth Memory (HBM2E) Interface Intel® FPGA IP Interface
6. High Bandwidth Memory (HBM2E) Interface Intel® FPGA IP Controller Performance
7. Document Revision History for High Bandwidth Memory (HBM2E) Interface Intel FPGA IP User Guide
A. High Bandwidth Memory (HBM2E) Interface Intel® FPGA IP Intel® Quartus® Prime Software Flow
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5.2.1. Reset, Clock, and Calibration Status Signals
Signal | Direction | Description |
---|---|---|
hbm_reset_n | Input | User-initiated, negative-edge HBM reset coming from core fabric. |
hbm_reset_in_prog | Output | Indicates the user-initiated HBM reset is in progress. User attempts to reset while this is active will be ignored. |
Signal | Direction | Description |
---|---|---|
uibpll_refclk | Input | Reference clock input for the UIB PLL. This clock must be stable and free-running at device power-up for successful configuration. Refer to Intel Agilex® 7 pin connection guidelines for information on how to supply this clock. |
fabric_clk | Input | Core clock used to synchronize reset and status signals. |
Signal | Direction | Description |
---|---|---|
local_cal_success | Output | Indicates calibration success. This signal is asynchronous. Once asserted, this signal remains high until an HBM reset with calibration is attempted. |
local_cal_fail | Output | Indicates calibration failure. This signal is asynchronous. Once asserted, this signal remains high until an HBM reset with calibration is attempted. |
Clocking recommendations for Reliable Calibration of the HBM2E Interface
Observe the following clock guidelines for reliable calibration of the HBM2E interface:
- The UIB PLL reference clocks (one per HBM2E interface) must be provided through an external clock source and must be stable and free-running prior to configuration and stable thereafter.