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1. About the High Bandwidth Memory (HBM2E) Interface Intel Agilex® 7 FPGA IP User Guide
2. Introduction to High Bandwidth Memory
3. Intel Agilex® 7 M-Series HBM2E Architecture
4. Creating and Parameterizing the High Bandwidth Memory (HBM2E) Interface Intel® FPGA IP
5. High Bandwidth Memory (HBM2E) Interface Intel® FPGA IP Interface
6. High Bandwidth Memory (HBM2E) Interface Intel® FPGA IP Controller Performance
7. Document Revision History for High Bandwidth Memory (HBM2E) Interface Intel FPGA IP User Guide
A. High Bandwidth Memory (HBM2E) Interface Intel® FPGA IP Intel® Quartus® Prime Software Flow
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3.1. Intel Agilex® 7 M-Series HBM2E Introduction
Intel Agilex® 7 M-Series devices use the Intel EMIB technology to interface to the HBM2E memory devices.
- The Intel Agilex® 7 FPGAs offer up to two HBM2E devices.
- Each HBM2E device can have a device density of 8GB or 16GB, based on the FPGA chosen.
This system-in-package solution helps to achieve maximum bandwidth and low power consumption in a small footprint.