F-Tile Dynamic Reconfiguration Design Example User Guide
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Ixiasoft
Visible to Intel only — GUID: uza1639667384052
Ixiasoft
1.7. Testing the Hardware Design Example
To start the System Console and test the hardware design example, follow these steps:
- After the hardware design example is configured on the Intel® Agilex™ 7 device, in the Intel® Quartus® Prime Pro Edition software, click Tools > System Debugging Tools > System Console.
- In the Tcl Console pane, type cd hwtest to change directory to <design_example_dir>/hardware_test_design/hwtest.
- Type source main_script.tcl to open a connection to the JTAG master and start the test.
- Analyze the results. Successful run displays Test Passed in the System Console.
Note: If internal serial loopback (ILB) is enabled for the current profile, you need to disable it using the FGT attribute access method before performing dynamic reconfiguration to the next target profile. If you do not follow this, you might observe that the Quartus Hard IP performs abnormally after dynamic reconfiguration.
The information in this section for testing the design example in hardware applies to the following dynamic reconfiguration design example: