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2.1. Stratix® 10 DisplayPort SST Parallel Loopback Design Features
2.2. Stratix® 10 DisplayPort SST TX-only or RX-only Design Features
2.3. Design Components
2.4. Clocking Scheme
2.5. Interface Signals and Parameters
2.6. Hardware Setup
2.7. Simulation Testbench
2.8. DisplayPort Transceiver Reconfiguration Flow
2.9. Transceiver Lane Configurations
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2.2. Stratix® 10 DisplayPort SST TX-only or RX-only Design Features
This section describes DisplayPort SST TX-only and RX-only design example variants. Simulation models are not available for TX-only and RX-only designs.