F-Tile Avalon® Streaming Intel® FPGA IP for PCI Express* Release Notes

ID 683886
Date 7/08/2024
Public

1.6. F-Tile Avalon Streaming Intel FPGA IP for PCI Express : IP Core v8.1.0

Table 6.  F-Tile Avalon Streaming Intel FPGA IP for PCI Express : IP v8.1.0 : 2023.04.17
Quartus® Prime Version Description Impact
23.1

The preset or default value for Gen 3 Requested equalization farend TX preset vector and Gen 4 Requested equalization far-end TX preset vector has been updated in the IP Parameter Editor GUI.

The new preset or default values are recommended for most designs.

You should update the preset value to the new one if the F-Tile PCIe IP was generated in the previous Quartus® Prime software version that uses the old default value.

Added Intel Agilex® 7 F-Tile FPGA Development Kit with rev B0 silicon board preset for design example generation.

The VID-related settings including the pin assignments are included in the .qsf file of the generated design example when selected.