AN 812: Platform Designer System Design Tutorial

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ID 683855
Date 4/02/2018
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Document Table of Contents
Document Table of Contents x
Platform Designer System Design Tutorial
Platform Designer System Design Tutorial x
Hardware and Software Requirements Download and Install the Tutorial Design Files Build the Hardware Design Build Software Applications and Download the Design AN 812: Platform Designer System Design Tutorial Revision History
Build the Hardware Design x
Open the Intel® Quartus® Prime Pro Edition Project Build a Platform Designer System with a Top-Down Approach Implement the Memory Tester Subsystem
Build a Platform Designer System with a Top-Down Approach x
Add a Processor Subsystem to the Top-Level Build the Processor Subsystem Add External Memory Interface Instantiate a Memory Tester Subsystem as a Generic Component Connect and Generate IP Files Examples of Platform Designer Generic Components
Build the Processor Subsystem x
Add a Nios® II Processor Add RAM, JTAG UART, and Avalon-MM Pipeline Bridge Connect cpu_subsystem Components Platform Designer and Platform Designer (Standard) Differences
Implement the Memory Tester Subsystem x
Add Clock, Reset, and Avalon-MM components Add Pre-Built Systems and Memory Test Microcore Components Export Signals, Set Base Address Assignments, and Connect Memory Tester Interface Components Resolve Interface Requirements and Value Mismatches Replace the memory_tester_subsystem Generic Component Synchronize IP Results
Build Software Applications and Download the Design x
Hardware setup Run the Bash Script
Platform Designer System Design Tutorial

Implement the Memory Tester Subsystem

Next, you implement the memory tester subsystem (previously instantiated as a generic component) using the Platform Designer template.

You typically perform this process as a member of a remote team with a need to implement the memory tester subsystem. The remote team member receives a .qsys file which serves as the requirement hand off for an implementation. This .qsys file contains the details needed for designing a block for the larger design, without access to the top level.

To implement the memory tester subsystem you must add components from the IP Catalog to this Platform Designer project, make connections, and export interfaces to match what is defined for the generic component. Once those processes are complete, replace the generic component in the top level system with this subsystem implementation.

To implement the subsystem, complete the following steps:

  1. To launch Platform Designer, click Tools > Platform Designer .
  2. Browse to the memory_tester_subsystem.qsys file and click Open.

    Platform Designer opens and displays an empty project. However, it embeds the interface requirements you defined in the generic component representation within the top level system used as a guide to implement this subsystem.

  3. To view these interfaces, click View > Interface Requirements.

    The left column shows the interfaces instantiated in the current Platform Designer (Standard) Pro system. The right column shows the requirements you define in previous steps. Since there are no components or exported interfaces, all the interface names are highlighted in green, denoting missing items.

    Figure 30. Interface Requirements Dialog Box

Section Content
Add Clock, Reset, and Avalon-MM components
Add Pre-Built Systems and Memory Test Microcore Components
Export Signals, Set Base Address Assignments, and Connect Memory Tester Interface Components
Resolve Interface Requirements and Value Mismatches
Replace the memory_tester_subsystem Generic Component
Synchronize IP Results

Level Two Title