AN 812: Platform Designer System Design Tutorial

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ID 683855
Date 4/02/2018
Public
Document Table of Contents
Document Table of Contents x
Platform Designer System Design Tutorial
Platform Designer System Design Tutorial x
Hardware and Software Requirements Download and Install the Tutorial Design Files Build the Hardware Design Build Software Applications and Download the Design AN 812: Platform Designer System Design Tutorial Revision History
Build the Hardware Design x
Open the Intel® Quartus® Prime Pro Edition Project Build a Platform Designer System with a Top-Down Approach Implement the Memory Tester Subsystem
Build a Platform Designer System with a Top-Down Approach x
Add a Processor Subsystem to the Top-Level Build the Processor Subsystem Add External Memory Interface Instantiate a Memory Tester Subsystem as a Generic Component Connect and Generate IP Files Examples of Platform Designer Generic Components
Build the Processor Subsystem x
Add a Nios® II Processor Add RAM, JTAG UART, and Avalon-MM Pipeline Bridge Connect cpu_subsystem Components Platform Designer and Platform Designer (Standard) Differences
Implement the Memory Tester Subsystem x
Add Clock, Reset, and Avalon-MM components Add Pre-Built Systems and Memory Test Microcore Components Export Signals, Set Base Address Assignments, and Connect Memory Tester Interface Components Resolve Interface Requirements and Value Mismatches Replace the memory_tester_subsystem Generic Component Synchronize IP Results
Build Software Applications and Download the Design x
Hardware setup Run the Bash Script
Platform Designer System Design Tutorial

Add Pre-Built Systems and Memory Test Microcore Components

The files listed in the Design Files topic contain two pre-built systems: a pattern checker system, and a pattern generator system. These pre-built Platform Designer systems appear in the IP Catalog in the System folder. The IP Catalog also contains a list of available Memory Test Microcores. The source files of these custom IP cores are located in <project folder>/memory_tester_ip. The memory_tester_search_path.ipx file included in the project provides this path to Platform Designer.

Figure 31. IP Catalog Memory Test Microcore and System Components

To add these pre-built Platform Designer systems, complete the following steps:

  1. In the IP Catalog, expand the System folder and double-click pattern_checker_system to add the pattern checker component.
  2. To add the component, click Finish.
  3. To rename the pattern checker, right-click the system in the Name column and type pattern_checker_subsystem.
  4. In the IP Catalog, double-click pattern_generator_system to add the prebuilt pattern generator component.
  5. To add the component, click Finish.
  6. To rename the pre-built pattern generator, right-click the system in the Name column and type pattern_generator_subsystem.
  7. In the IP Catalog, expand the Memory Test Microcores folder, and double-click Pattern Writer.
  8. In the Pattern Writer parameter editor, turn on Burst Enable.
  9. To add the component, click Finish.
  10. To rename the pattern writer component, right-click the system in the Name column and type pattern_writer.
  11. In the IP Catalog, double-click Pattern Reader.
  12. In the Pattern Reader parameter editor, turn on Burst Enable.
  13. Click Finish to add the component.
  14. In the IP Catalog, double-click to begin adding a RAM Test Controller.
  15. Click Finish to add the component.
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