Visible to Intel only — GUID: add1498238191316
Ixiasoft
Add Clock, Reset, and Avalon-MM components
Add Pre-Built Systems and Memory Test Microcore Components
Export Signals, Set Base Address Assignments, and Connect Memory Tester Interface Components
Resolve Interface Requirements and Value Mismatches
Replace the memory_tester_subsystem Generic Component
Synchronize IP Results
Visible to Intel only — GUID: add1498238191316
Ixiasoft
Add Clock, Reset, and Avalon-MM components
In order to resolve missing items in the Interface Requirements list, add a clock bridge, reset bridge, and Avalon-MM pipeline bridge first:
- In the IP Catalog, type clock in the search box and double-click Clock Bridge.
- Click Finish to add the clock bridge.
- Type reset in the search box and double-click Reset Bridge.
- Click Finish to add the reset bridge.
- In the System Components tab, right-click the name of the clock bridge and click Rename. Type clk.
- In the System Components tab, right-click the name of the reset bridge and click Rename. Type reset.
- In the Export column, double-click the entry corresponding to the clock input for the clk component and rename it clk.
- In the Export column, double-click the entry corresponding to the reset input for the reset component and rename it reset.
- Type pipeline in the IP Catalog search box and double-click Avalon-MM Pipeline Bridge.
- When the Avalon-MM Pipeline Bridge parameter editor opens, in Address , set the Address width to 13.
- To add the component, click Finish.
- Right-click the name of the Avalon-MM Pipeline Bridge and click Rename. Type mm_bridge.