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1. Intel® MAX® 10 High-Speed LVDS I/O Overview
2. Intel® MAX® 10 High-Speed LVDS Architecture and Features
3. Intel® MAX® 10 LVDS Transmitter Design
4. Intel® MAX® 10 LVDS Receiver Design
5. Intel® MAX® 10 LVDS Transmitter and Receiver Design
6. Intel® MAX® 10 High-Speed LVDS Board Design Considerations
7. Soft LVDS IP Core References
8. Intel® MAX® 10 High-Speed LVDS I/O User Guide Archives
9. Document Revision History for Intel® MAX® 10 High-Speed LVDS I/O User Guide
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2.2. Intel® MAX® 10 LVDS SERDES I/O Standards Support
The Intel® MAX® 10 D and S device variants support different LVDS I/O standards. All I/O banks in Intel® MAX® 10 devices support true LVDS input buffers and emulated LVDS output buffers. However, only the bottom I/O banks support true LVDS output buffers.
I/O Standard | I/O Bank | TX | RX | Intel® MAX® 10 Device Support | Notes | |
---|---|---|---|---|---|---|
Dual Supply Device |
Single Supply Device |
|||||
True LVDS | All | Bottom banks only | Yes | Yes | Yes |
|
Emulated LVDS (three resistors) | All | Yes | — | Yes | Yes | All I/O banks support emulated LVDS output buffers. |
True RSDS | Bottom | Yes | — | Yes | Yes | — |
Emulated RSDS (single resistor) | All | Yes | — | Yes | — | All I/O banks support emulated RSDS output buffers. |
Emulated RSDS (three resistors) | All | Yes | — | Yes | Yes | All I/O banks support emulated RSDS output buffers. |
True Mini-LVDS | Bottom | Yes | — | Yes | — | — |
Emulated Mini-LVDS (three resistors) | All | Yes | — | Yes | — | All I/O banks support emulated Mini-LVDS output buffers. |
PPDS | Bottom | Yes | — | Yes | — | — |
Emulated PPDS (three resistors) | All | Yes | — | Yes | — | — |
Bus LVDS | All | Yes | Yes | Yes | Yes |
|
LVPECL | All | — | Yes | Yes | Yes | Supported only on dual function clock input pins. |
TMDS | All | — | Yes | Yes | — |
|
Sub-LVDS | All | Yes | Yes | Yes | — |
|
SLVS | All | Yes | Yes | Yes | — |
|
HiSpi | All | — | Yes | Yes | — |
|
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