Visible to Intel only — GUID: sam1394016157121
Ixiasoft
Visible to Intel only — GUID: sam1394016157121
Ixiasoft
2.3.2.2. Programmable Bus Hold
The bus-hold circuitry holds the signal on an I/O pin at its last-driven state until the next input signal is present. Because of this, you do not require an external pull-up or pull-down resistor to hold a signal level when the bus is tri-stated.
- The I/O pin state is weak pull-up during configuration—the I/O pin retains the high value when the device enters user mode.
- The I/O pin is tri-stated during configuration—the I/O pin value can be high or low when the device enters user mode.
For each I/O pin, you can individually specify that the bus-hold circuitry pulls non-driven pins away from the input threshold voltage—where noise can cause unintended high-frequency switching. To prevent over-driving signals, the bus-hold circuitry drives the voltage level of the I/O pin lower than the VCCIO level.
If you enable the bus-hold feature, you cannot use the programmable pull-up option. To configure the I/O pin for differential signals, disable the bus-hold feature.