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1.1. Generating the Design Example
1.2. Directory Structure
1.3. Simulating the Design Example Testbench
1.4. Compiling and Configuring the Design Example in Hardware
1.5. Changing Target Device in Hardware Design Example
1.6. Testing the Low Latency E-Tile 40G Ethernet Intel® FPGA IP Design in Hardware
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2.2. Hardware and Software Requirements
To test the example design, use the following hardware and software:
- Quartus® Prime Pro Edition software
- System Console
- ModelSim* , VCS* , VCS* MX, NCSim, or Xcelium* Simulator
- Intel Stratix 10 TX E-Tile Transceiver Signal Integrity Development Kit or Intel Intel Agilex 7 F-series Transceiver-SoC Development Kit