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1.1. Reference Design Overview
1.2. Floorplanning
1.3. Getting Started
1.4. Reference Design Components
1.5. Compiling the Reference Design
1.6. Bringing Up the Reference Design
1.7. Testing the Reference Design
1.8. Extending the Reference Design with Custom Persona
1.9. Reference Design Files
1.10. Document Revision History for AN 813: Hierarchical Partial Reconfiguration over PCI Express* Reference Design for Intel® Arria® 10 Devices
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1.4.1. BSP Top
This Platform Designer system contains all the subsystems of this reference design. The system comprises the following three main components:
- The top-level design
- Intel Arria 10/Cyclone 10 Hard IP for PCI Express IP
- External Memory Interfaces Intel® Arria® 10 FPGA IP