AN 957: Time-Sensitive Networking for Drive-on-Chip Design Example

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ID 683707
Date 10/30/2021
Public
Document Table of Contents
Document Table of Contents x
1. About the Time-Sensitive Networking for Drive-on-Chip Design Example 2. Getting Started with the TSN for Drive-on-Chip Design Example 3. Porting the Intel MAX 10 Drive-On-Chip design to the Cyclone V SoC Development Board 4. Running HPS Software for the TSN Drive-on-Chip Design 5. Connecting the Cyclone V SoC Development board to the Tandem 48 V Motion-Power board 6. Running the Program 7. TSN Configuration Example 8. Document Revision History for AN 957: Time-Sensitive Networking for Drive-on-Chip Design Example A. Example .qsf for Pin Assignments and Attributes B. Top-level Verilog HDL File Example C. YOCTO Build Patch File (cvsx_doc_tsn_2_3-rt) for the TSN Drive-on-Chip Design Example D. Script to read and change MAC addresses from Cyclone V SoC EEPROM
1. About the Time-Sensitive Networking for Drive-on-Chip Design Example x
1.1. Features of TSN for Drive-on-Chip Design Example 1.2. TSN for Drive-on-Chip Design Example General Description 1.3. Messages from the TSN Drive-on-Chip Design Example 1.4. Design Flow for the TSN Drive-on-Chip Design Example
2. Getting Started with the TSN for Drive-on-Chip Design Example x
2.1. Hardware Requirements for the TSN for Drive-on-Chip Design Example 2.2. Software Requirements for the TSN for Drive-on-Chip Design Example 2.3. Configuring the Cyclone V SoC Development Board for the TSN for Drive-on-Chip Design Example 2.4. Programming the FPGA for the TSN for Drive-on-Chip Design Example 2.5. Creating an SD Card Image for the TSN for Drive-on-Chip Design Example 2.6. Turning on the Cyclone V SoC Development Board for the TSN for Drive-on-Chip Design Example 2.7. Configuring the TSN IP
3. Porting the Intel MAX 10 Drive-On-Chip design to the Cyclone V SoC Development Board x
3.1. Changing File Names, Revision Name, and Target Device for the TSN Drive-on-Chip Design Example 3.2. Modifying the Drive-On-Chip Qsys System 3.3. Adding the TTTech TSN IP to the Qsys system 3.4. Connecting the TSN and Drive-on-Chip Subsystems 3.5. Compiling the Quartus Prime Design and Top-Level Module 3.6. Generating the Preloader 3.7. Generating a .jic file 3.8. Compiling the Drive-on-Chip Design Software in Nios II Software Build Tools 3.9. Launching a YOCTO Build 3.10. Building an SD Card Image for the TSN Drive-on-Chip Design Example 3.11. Changing MAC Addresses 3.12. Reading and Checking Physical Addresses on the Cyclone V SoC Development Board
4. Running HPS Software for the TSN Drive-on-Chip Design x
4.1. Installing the Arm Compiler for Motor Control from Linux 4.2. Creating a Basic C Program for Motor Control 4.3. OPC UA PubSub based on open62541 4.4. Getting and Building open62541 4.5. Setting up Debug Sessions in DS-5
1. About the Time-Sensitive Networking for Drive-on-Chip Design Example
2. Getting Started with the TSN for Drive-on-Chip Design Example
3. Porting the Intel MAX 10 Drive-On-Chip design to the Cyclone V SoC Development Board
4. Running HPS Software for the TSN Drive-on-Chip Design
5. Connecting the Cyclone V SoC Development board to the Tandem 48 V Motion-Power board
6. Running the Program
7. TSN Configuration Example
8. Document Revision History for AN 957: Time-Sensitive Networking for Drive-on-Chip Design Example
A. Example .qsf for Pin Assignments and Attributes
B. Top-level Verilog HDL File Example
C. YOCTO Build Patch File (cvsx_doc_tsn_2_3-rt) for the TSN Drive-on-Chip Design Example
D. Script to read and change MAC addresses from Cyclone V SoC EEPROM

D. Script to read and change MAC addresses from Cyclone V SoC EEPROM

To check the physical addresses in the Cyclone V SoC development board, for the TSN Drive-on-Chip Design example. 
#!/bin/sh
# Get a MAC address from the EEPROM from a given offset.
get_mac()
{
    ret_mac=""
    i2cset -y 0 0x51 0 $1 i
    for i in 0 1 2 3 4 5; do
        ret_mac=$ret_mac$(i2cget -y 0 0x51 | sed 's/0x/:/')
    done
    echo ${ret_mac#:}
}

help()
{
        echo " "
        echo "To read and write physical MAC addresses in the Cyclone V SoC"
        echo "To read type:"
        echo "     >> ./Read_Write_MAC_CVSX.sh read"
        echo "To write type:"
        echo "     >> ./Read_Write_MAC_CVSX.sh write <MAC address> <offset>"
        echo "Example"
        echo "     >> ./Read_Write_MAC_CVSX.sh write AA:BB:CC:DD:FF:GG 45"
        echo "This script does not validate the address, MAC addresses must be typed only in the prev
        echo " "

}

case "$1" in
    read)
        echo 'Reading the EEPROM...'
        echo 'MAC store in addres offset 45' $(get_mac 45)
        echo 'MAC store in addres offset 51' $(get_mac 51)
        echo 'MAC store in addres offset 57' $(get_mac 57)
        echo 'MAC store in addres offset 63' $(get_mac 63)
        echo 'MAC store in addres offset 69' $(get_mac 69)
        echo 'MAC store in addres offset 75' $(get_mac 75)
        echo ' '
    ;;

    write)
        echo " "
        echo "Writing EEPROM..."
        A1="$(cut -d':' -f1 <<< $2)"
        A2="$(cut -d':' -f2 <<< $2)"
        A3="$(cut -d':' -f3 <<< $2)"
        A4="$(cut -d':' -f4 <<< $2)"
        A5="$(cut -d':' -f5 <<< $2)"
        A6="$(cut -d':' -f6 <<< $2)"

        i2cset -y 0 0x51  0 $3 0x$A1 i
        i2cset -y 0 0x51  0 $(($3+1)) 0x$A2 i
        i2cset -y 0 0x51  0 $(($3+2)) 0x$A3 i
        i2cset -y 0 0x51  0 $(($3+3)) 0x$A4 i
        i2cset -y 0 0x51  0 $(($3+4)) 0x$A5 i
        i2cset -y 0 0x51  0 $(($3+5)) 0x$A6 i
        echo "Address $2 written to EEPROM offset $3"
        echo ' '
    ;;

    *)                                               
        help                                         
    ;;                                               
                                                       
esac        
exit 0
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