Nios® V Processor Reference Manual

ID 683632
Date 7/26/2024
Public
Document Table of Contents

3.3.5.2.1. Timer and Software Interrupt Module

The timer and software interrupt hosts the following registers:
  • Machine Time (mtime) and Machine Time Compare (mtimecmp) registers for timer interrupt.
  • Machine Software Interrupt-pending (msip) field for the software interrupt.

The value of mtime increments after every clock cycle. When the value of mtime is greater or equal to the value of mtimecmp, the timer posts the interrupt.