Nios® V Processor Reference Manual

ID 683632
Date 7/26/2024
Public
Document Table of Contents

3.5.1. Instruction Set Reference

The Nios® V/m processor is based on the RV32IZicsr specification. RV32IZicsr includes the following instructions sets:
  • RV32I base integer instruction set
  • Control and status register instructions ("Zicsr" extension).

There are 6 types of instruction formats. They are R-type, I-type, S-type, B-type, U-type, and J-type.

Table 55.  Instruction Formats (R-type)
Bit Field (R-type)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
funct7 rs2 rs1
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
rs1 funct3 rd opcode
Table 56.  Instruction Formats (I-type)
Bit Field (I-type)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
imm[11:0] rs1
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
rs1 funct3 rd opcode
Table 57.  Instruction Formats (S-type)
Bit Field (S-type)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
imm[11:5] rs2 rs1
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
rs1 funct3 imm[4:0] opcode
Table 58.  Instruction Formats (B-type)
Bit Field (B-type)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
imm[12] imm[10:5] rs2 rs1
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
rs1 funct3 imm[4:1] imm[11] opcode
Table 59.   Instruction Formats (U-type)
Bit Field (U-type)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
imm[31:16]
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
imm[15:12] rd opcode
Table 60.  Instruction Formats (J-type)
Bit Field (J-type)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
imm[20] imm[10:1] imm[11] imm[19:16]
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
imm[15:12] rd opcode