AN 711: Power Reduction Features in Intel® Arria® 10 Devices

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ID 683566
Date 5/27/2022
Public
Document Table of Contents
Document Table of Contents x
AN 711: Power Reduction Features in Intel® Arria® 10 Devices
AN 711: Power Reduction Features in Intel® Arria® 10 Devices x
Power Reduction and Performance Intel® Arria® 10 Power Reduction Techniques System Topology Options SmartVID Topologies SmartVID Power Savings Estimation VID Design for Intel® Arria® 10 FPGAs Document Revision History for AN 711: Power Reduction Features in Intel® Arria® 10 Devices
Intel® Arria® 10 Power Reduction Techniques x
SmartVID SmartVID General Configuration
System Topology Options x
Power Sense Lines
SmartVID Topologies x
SmartVID Controller IP Core Parallel Control System PMBus Control System Single-Wire Interface PWM Control System
Parallel Control System x
Intel® Quartus® Prime Parallel Control System Instantiation Parallel SmartVID Regulator Implementation Guidelines
PMBus Control System x
PMBus System Implementation PMBus Voltage Regulators PMBus VID Implementation Guidelines
Single-Wire Interface PWM Control System x
Single-Wire Interface PWM System Implementation
SmartVID Power Savings Estimation x
Enabling SmartVID in the Intel® Quartus® Prime Software
VID Design for Intel® Arria® 10 FPGAs x
Parallel VID PMBus SmartVID VID Design Guidelines
AN 711: Power Reduction Features in Intel® Arria® 10 Devices

SmartVID General Configuration

The system is comprised of four main sections.

Table 2.  SmartVID Blocks and Descriptions
Section Description
VID Register Provides status input for the SmartVID Controller IP.
Temperature Sensor
VID Soft Controller One component of the SmartVID Controller IP that provides data to the voltage regulator controller.
Voltage Regulator System Controller Voltage regulator is a generic term to designate any sort of voltage conversion system: DC-to-DC converters, switching regulators, and linear regulators. The system controller requests an external programmable voltage regulator system to provide the correct voltage to the VCC input of the FPGA. This helps to limit power consumption. The controller can have several different topologies, which are explained below.
Figure 2. General Configuration for the SmartVID Controller IP
Level Two Title