AN 711: Power Reduction Features in Intel® Arria® 10 Devices

Download PDF
ID 683566
Date 5/27/2022
Public
Document Table of Contents
Document Table of Contents x
AN 711: Power Reduction Features in Intel® Arria® 10 Devices
AN 711: Power Reduction Features in Intel® Arria® 10 Devices x
Power Reduction and Performance Intel® Arria® 10 Power Reduction Techniques System Topology Options SmartVID Topologies SmartVID Power Savings Estimation VID Design for Intel® Arria® 10 FPGAs Document Revision History for AN 711: Power Reduction Features in Intel® Arria® 10 Devices
Intel® Arria® 10 Power Reduction Techniques x
SmartVID SmartVID General Configuration
System Topology Options x
Power Sense Lines
SmartVID Topologies x
SmartVID Controller IP Core Parallel Control System PMBus Control System Single-Wire Interface PWM Control System
Parallel Control System x
Intel® Quartus® Prime Parallel Control System Instantiation Parallel SmartVID Regulator Implementation Guidelines
PMBus Control System x
PMBus System Implementation PMBus Voltage Regulators PMBus VID Implementation Guidelines
Single-Wire Interface PWM Control System x
Single-Wire Interface PWM System Implementation
SmartVID Power Savings Estimation x
Enabling SmartVID in the Intel® Quartus® Prime Software
VID Design for Intel® Arria® 10 FPGAs x
Parallel VID PMBus SmartVID VID Design Guidelines
AN 711: Power Reduction Features in Intel® Arria® 10 Devices

PMBus Control System

Note: Currently, the PMBus control system is being implemented on some Intel® FPGA development boards. Contact your sales and service representative for availability.

In a PMBus system, the Intel® Arria® 10 device acts as either a PMBus master or a PMBus slave, according to your design choice. The following figure illustrates the simplest PMBus system for SmartVID support. In this case, the Intel® Arria® 10 device acts as a PMBus master and communicates the SmartVID information to the voltage regulator system directly through the PMBus.

Figure 7. Data Flow for the PMBus InterfaceIn this configuration, the only devices on the PMBus are the Intel® Arria® 10 device and the voltage regulator system. The voltage regulator system provides the core voltage for the Intel® Arria® 10 device.

In other PMBus systems, you may choose to have an external PMBus master separate from the Intel® Arria® 10 device. In this case, the Intel® Arria® 10 device may act as either a PMBus slave, or as a PMBus master in multi-master mode.

Figure 8. PMBus System with Multiple RegulatorsIn this configuration, the Intel® Arria® 10 device acts as a PMBus master in multi-master mode.

In this system, the VID soft controller feeds data to a PMBus Master interface on the FPGA. Other devices on the PMBus may require level shifters to translate the FPGA IO voltage to other voltage levels. PMBus systems can contain more than one regulator.


Section Content
PMBus System Implementation
PMBus Voltage Regulators
PMBus VID Implementation Guidelines

Level Two Title