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1. About the R-Tile Avalon® Streaming Intel® FPGA IP for PCI Express
2. Quick Start Guide
3. R-Tile Avalon® Streaming Intel® FPGA IP for PCI Express* Design Example User Guide Archives
4. Document Revision History for the R-Tile Avalon® Streaming Intel® FPGA IP for PCI Express* Design Example User Guide
2.4.5.1. ebfm_barwr Procedure
2.4.5.2. ebfm_barwr_imm Procedure
2.4.5.3. ebfm_barrd_wait Procedure
2.4.5.4. ebfm_barrd_nowt Procedure
2.4.5.5. ebfm_cfgwr_imm_wait Procedure
2.4.5.6. ebfm_cfgwr_imm_nowt Procedure
2.4.5.7. ebfm_cfgrd_wait Procedure
2.4.5.8. ebfm_cfgrd_nowt Procedure
2.4.5.9. BFM Configuration Procedures
2.4.5.10. BFM Shared Memory Access Procedures
2.4.5.11. BFM Log and Message Procedures
2.4.5.12. Verilog HDL Formatting Functions
2.4.5.11.1. ebfm_display Verilog HDL Function
2.4.5.11.2. ebfm_log_stop_sim Verilog HDL Function
2.4.5.11.3. ebfm_log_set_suppressed_msg_mask Task
2.4.5.11.4. ebfm_log_set_stop_on_msg_mask Verilog HDL Task
2.4.5.11.5. ebfm_log_open Verilog HDL Function
2.4.5.11.6. ebfm_log_close Verilog HDL Function
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4. Document Revision History for the R-Tile Avalon® Streaming Intel® FPGA IP for PCI Express* Design Example User Guide
Document Version | Intel® Quartus® Prime Version | IP Version | Changes |
---|---|---|---|
2023.12.04 | 23.4 | 11.1.0 |
|
2023.10.19 | 23.3 | 11.0.0 | Updated the screenshots showing the results of running the Maximum Performance Test in the Running the Performance Design Example section. |
2023.10.02 | 23.3 | 11.0.0 | Added steps to run the Performance design example 2x8 to the Running the Performance Design Example section. |
2023.06.26 | 23.2 | 10.0.0 | Changed the Intel® Quartus® Prime version number and IP version number. |
2023.04.03 | 23.1 | 9.0.0 |
|
2022.12.19 | 22.4 | 8.0.0 | Updated the ACDS version number and the IP version number. |
2022.09.26 | 22.3 | 7.0.0 |
|
2022.06.20 | 22.2 | 6.0.0 | Added a section on how to simulate the design example using the Xcelium* simulator. |
2022.03.28 | 22.1 | 5.0.0 |
|
2021.12.13 | 21.4 | 4.0.0 | Added support for the Gen4 x16, Gen3 x16, Gen4 2x8 and Gen3 2x8 design examples. |
2021.10.04 | 21.3 | 3.0.0 | Added instructions on how to simulate the design example using the VCS* MX simulator to the section Simulating the Design Example. |
2021.07.12 | 21.2 | 2.0.0 | Initial release. |