Visible to Intel only — GUID: mwh1410470991846
Ixiasoft
2.1. I/O Planning Overview
2.2. Assigning I/O Pins
2.3. Importing and Exporting I/O Pin Assignments
2.4. Validating Pin Assignments
2.5. Verifying I/O Timing
2.6. Viewing Routing and Timing Delays
2.7. Analyzing Simultaneous Switching Noise
2.8. Scripting API
2.9. Managing Device I/O Pins Revision History
Visible to Intel only — GUID: mwh1410470991846
Ixiasoft
1.1.1. Global Constraints and Assignments
Global constraints and project settings affect the entire Intel® Quartus® Prime project and all the applicable logic in the design. You often define global constraints in early project development; for example, when running the New Project Wizard. Intel® Quartus® Prime software stores global constraints in .qsf files, one for each project revision.
Assignment Type | Example | New Project Wizard | Device Dialog Box | Settings Dialog Box | Options Dialog Box |
---|---|---|---|---|---|
Project-wide | Project files | X | X | ||
Synthesis |
|
X | X | X | |
Fitter |
|
X | X | ||
Simulation | Vector input source | X | |||
Third-party Tools | External Logic Analyzer | X | |||
IP Settings | Maximum Platform Designer (Standard) Memory Usage | X |
Related Information