Visible to Intel only — GUID: mwh1410471045937
Ixiasoft
2.1. I/O Planning Overview
2.2. Assigning I/O Pins
2.3. Importing and Exporting I/O Pin Assignments
2.4. Validating Pin Assignments
2.5. Verifying I/O Timing
2.6. Viewing Routing and Timing Delays
2.7. Analyzing Simultaneous Switching Noise
2.8. Scripting API
2.9. Managing Device I/O Pins Revision History
Visible to Intel only — GUID: mwh1410471045937
Ixiasoft
2.2.5. Entering Pin Assignments in HDL Code
You can use synthesis attributes or low‑level I/O primitives to embed I/O pin assignments directly in your HDL code. When you analyze and synthesize the HDL code, the information is converted into the appropriate I/O pin assignments. You can use either of the following methods to specify pin‑related assignments with HDL code:
- Assigning synthesis attributes for signal names that are top‑level pins
- Using low‑level I/O primitives, such as ALT_BUF_IN, to specify input, output, and differential buffers, and for setting parameters or attributes