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2.1. I/O Planning Overview
2.2. Assigning I/O Pins
2.3. Importing and Exporting I/O Pin Assignments
2.4. Validating Pin Assignments
2.5. Verifying I/O Timing
2.6. Viewing Routing and Timing Delays
2.7. Analyzing Simultaneous Switching Noise
2.8. Scripting API
2.9. Managing Device I/O Pins Revision History
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Ixiasoft
2.7. Analyzing Simultaneous Switching Noise
Click Processing > Start > Start SSN Analyzer to estimate the voltage noise for each pin in the design. The simultaneous switching noise (SSN) analysis accounts for the pin placement, I/O standard, board trace, output enable group, timing constraint, and PCB characteristics that you specify. The analysis produces a voltage noise estimate for each pin in the design. View the SSN results in the Pin Planner and adjust your I/O assignments to optimize signal integrity.