Visible to Intel only — GUID: hej1520510905151
Ixiasoft
Visible to Intel only — GUID: hej1520510905151
Ixiasoft
2.9.1.1. MAC TX Datapath
When the TX MAC module in a channel is enabled, it receives the client payload data with the destination and source addresses and then adds, appends, or updates various header fields in accordance with the configuration specified. The MAC does not modify the destination address or the payload received from the client. However, the TX MAC module adds a preamble (if the IP core is not configured to receive the preamble from user logic), pads the payload of frames greater than eight bytes to satisfy the minimum Ethernet frame payload of 46 bytes, and if you enable source address insertion, replaces the bytes in the source address field position of your data with a stored source address you provide as a parameter.
The client interface includes a port named i_skip_crc, which when asserted during a frame, makes the MAC skip the insertion of source address, padding, and CRC.
- When CRC insertion is skipped, the client must provide a CRC for the frame data it writes in the last 4 bytes of the frame.
- When padding is skipped, the frame data must be large enough to include a fully formed frame header (at least 14 bytes long) or the MAC will automatically mark it as an error frame.
The TX MAC module always inserts IDLE bytes to maintain an average IPG.
The E-Tile Hard IP for Ethernet Intel FPGA IP drops incoming frames of less than nine bytes.
- <p> = payload size, which is arbitrarily large.
- <s> = number of padding bits (0–46 bytes)
- <g> = number of IPG bits (full bytes)
The following sections describe the functions performed by the TX MAC: