Avalon Verification IP Suite: User Guide

ID 683439
Date 2/17/2022
Public
Document Table of Contents

5.4.45. set_response_timeout()

Prototype:

void set_response_timeout(int cycles)

Arguments:

Verilog HDL: int cycles

VHDL: int cycles, bfm_id, req_if(bfm_id)

Returns:

void

Description:

Sets the number of cycles that may elapse before response time out. Disable time-out by setting the value to 0.
Language support: Verilog HDL, VHDL