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Ixiasoft
Visible to Intel only — GUID: nik1412471930257
Ixiasoft
20. Document Revision History
Document Version | Intel® Quartus® Prime Version | Changes |
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2022.02.17 | 20.4 | Updated the numbering of sections in Clock Source API. |
2022.01.24 | 20.4 | Changed the maximum legal value of the SRC_SYMBOLS_PER_BEAT and SRC_DATA_BITS_PER_SYMBOL parameters to 8192 in the Avalon Streaming Credit Source BFM and Avalon Streaming Credit Sink BFM sections. |
2021.01.29 | 20.4 | Replaced the get_response_write_response() API with get_write_response_status() in the Avalon-MM Master BFM chapter. Updated the API set_write_response_status() in the Avalon-MM Slave BFM chapter. |
2020.12.14 | 20.4 | Added three new APIs to the Avalon® Streaming Credit Source BFM chapter: get_outstanding_credit(), set_transaction_channel() and set_transaction_error(). Also added three new APIs to the Avalon® Streaming Credit Sink BFM chapter: get_outstanding_credit(), get_transaction_channel() and get_transaction_error(). |
2020.04.24 | 20.1 | Added the chapters Avalon® Streaming Credit Source BFM and Avalon® Streaming Credit Sink BFM. |
2019.04.03 | 16.1 | Removed VHDL from the Language Support field for the APIs clock_stop(), get_run_state() and get_version(). |
2016.12.13 | 16.1 | Made the following changes:
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2015.06.04 | 15.1 | Made the following changes:
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June 2014 | 3.3 | Made the following changes:
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May 2013 | 3.2 | Added information on VHDL support for verification IP. Removed information on the following wrappers. These wrappers are not supported in the Quartus II software version 13.0 and higher.
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June 2012 | 3.1 |
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