Avalon Verification IP Suite: User Guide

ID 683439
Date 2/17/2022
Public
Document Table of Contents

6.4.26. set_command_transaction_mode()

Prototype:

void set_command_transaction_mode (int mode);

Arguments:

Verilog HDL: mode

VHDL: mode, bfm_id, req_if(bfm_id)

Returns:

void

Description:

By default, write burst commands are consolidated into a single command transaction. The single command transaction contains the write data for all burst cycles in that command. This mode is set when the mode argument equals 0. When the mode argument is set to 1, the write burst commands yield one command transaction per burst cycle.
Language support: Verilog HDL, VHDL