Visible to Intel only — GUID: otg1477082909816
Ixiasoft
1.1. Instantiating the Partial Reconfiguration IP Core in the Qsys Interface
1.2. Instantiating the Partial Reconfiguration IP Core in the Intel® Quartus® Prime IP Catalog
1.3. Enable Compression
1.4. Enable Enhanced Decompression
1.5. Data Compression Comparison
1.6. Bitstream Compatibility Check
1.7. Clock-to-Data Ratio (CD Ratio)
1.8. Partial Reconfiguration IP Core Parameters
1.9. Partial Reconfiguration IP Core Ports
1.10. Reconfiguration Sequence
1.11. Slave Interface
1.12. FPGA Control Block Interface
1.13. Freeze Logic for 28-nm PR Regions
1.14. Data Source Controller
1.15. Standard Partial Reconfiguration Data Interface
1.16. JTAG Debug Mode for Partial Reconfiguration
1.17. Partial Reconfiguration IP Core User Guide Archives
1.18. Revision History
Visible to Intel only — GUID: otg1477082909816
Ixiasoft
1.7. Clock-to-Data Ratio (CD Ratio)
The proper clock-to-data ratio (CD Ratio) is critical for partial reconfiguration. A proper CD Ratio ensures that the data being processed synchronizes during the PR operation whether you are using compression, encryption, or both, or neither.
The Control Block (CB) interface receives data and sends it during a PR event with the CD Ratio you specify when you instantiate the Partial Reconfiguration IP core.
Compressed | Encrypted | CD Ratio |
---|---|---|
Off | Off | 1 |
Off | On | 2 |
On | Off | 4 |
On | On | 4 |
CD Ratio for the PR IP core in Stratix® V designs must be exact for the bitstream type. CD Ratio for plain Programmer Object File (POF) must be 1. CD Ratio for compressed POF must be 2, 4 or 8, depending on the width. Do not specify the CD Ratio as the necessary minimum to support different bitstream types.
Note: Standard encryption uses the same CD Ratio setting as a plain, uncompressed bitstream.