==========================================================
Beginning FPGA Built-In Self-Test
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Board Management Controller, MAX10 NIOS FW version D.2.1.24
Board Management Controller, MAX10 Build version D.2.0.7
//****** FME ******//
Object Id : 0xF100000
PCIe s:b:d.f : 0000:3f:00.0
Device Id : 0x0b30
Numa Node : 0
Ports Num : 01
Bitstream Id : 0x23000410010310
Bitstream Version : 0.2.3
Pr Interface Id : a5d72a3c-c8b0-4939-912c-f715e5dc10ca
Boot Page : user
Board Management Controller, MAX10 NIOS FW version D.2.1.24
Board Management Controller, MAX10 Build version D.2.0.7
//****** PORT ******//
Object Id : 0xF000000
PCIe s:b:d.f : 0000:3f:00.0
Device Id : 0x0b30
Numa Node : 0
Ports Num : 01
Bitstream Id : 0x23000410010310
Bitstream Version : 0.2.3
Pr Interface Id : a5d72a3c-c8b0-4939-912c-f715e5dc10ca
Accelerator Id : 9aeffe5f-8457-0612-c000-c9660d824272
Board Management Controller, MAX10 NIOS FW version D.2.1.24
Board Management Controller, MAX10 Build version D.2.0.7
//****** TEMP ******//
Object Id : 0xF100000
PCIe s:b:d.f : 0000:3f:00.0
Device Id : 0x0b30
Numa Node : 0
Ports Num : 01
Bitstream Id : 0x23000410010310
Bitstream Version : 0.2.3
Pr Interface Id : a5d72a3c-c8b0-4939-912c-f715e5dc10ca
(12) FPGA Core Temperature : 45.50 Celsius
(13) Board Temperature : 29.50 Celsius
(15) QSFP A Temperature : N/A
(38) QSFP B Temperature : N/A
(44) Retimer A Core Temperature : 47.50 Celsius
(45) Retimer A Serdes Temperature : 47.50 Celsius
(46) Retimer B Core Temperature : 46.50 Celsius
(47) Retimer B Serdes Temperature : 46.50 Celsius
Board Management Controller, MAX10 NIOS FW version D.2.1.24
Board Management Controller, MAX10 Build version D.2.0.7
//****** POWER ******//
Object Id : 0xF100000
PCIe s:b:d.f : 0000:3f:00.0
Device Id : 0x0b30
Numa Node : 0
Ports Num : 01
Bitstream Id : 0x23000410010310
Bitstream Version : 0.2.3
Pr Interface Id : a5d72a3c-c8b0-4939-912c-f715e5dc10ca
( 1) Board Power : 66.06 Watts
( 2) 12V Backplane Current : 3.03 Amps
( 3) 12V Backplane Voltage : 12.11 Volts
( 4) 1.2V Voltage : 1.19 Volts
( 6) 1.8V Voltage : 1.80 Volts
( 8) 3.3V Voltage : 3.26 Volts
(10) FPGA Core Voltage : 0.90 Volts
(11) FPGA Core Current : 13.86 Amps
(14) QSFP A Voltage : N/A
(24) 12V AUX Current : 2.43 Amps
(25) 12V AUX Voltage : 12.11 Volts
(37) QSFP B Voltage : N/A
Board Management Controller, MAX10 NIOS FW version D.2.1.24
Board Management Controller, MAX10 Build version D.2.0.7
//****** FME ERRORS ******//
Object Id : 0xF100000
PCIe s:b:d.f : 0000:3f:00.0
Device Id : 0x0b30
Numa Node : 0
Ports Num : 01
Bitstream Id : 0x23000410010310
Bitstream Version : 0.2.3
Pr Interface Id : a5d72a3c-c8b0-4939-912c-f715e5dc10ca
PCIe0 Errors : 0x0
PCIe1 Errors : 0x0
Catfatal Errors : 0x0
Seu Emr : 0x0
Inject Error : 0x0
Nonfatal Errors : 0x0
Next Error : 0x0
First Error : 0x0
Errors : 0x0
Board Management Controller, MAX10 NIOS FW version D.2.1.24
Board Management Controller, MAX10 Build version D.2.0.7
//****** PORT ERRORS ******//
Object Id : 0xF000000
PCIe s:b:d.f : 0000:3f:00.0
Device Id : 0x0b30
Numa Node : 0
Ports Num : 01
Bitstream Id : 0x23000410010310
Bitstream Version : 0.2.3
Pr Interface Id : a5d72a3c-c8b0-4939-912c-f715e5dc10ca
Accelerator Id : 9aeffe5f-8457-0612-c000-c9660d824272
First Malformed Req : 0x0
First Error : 0x0
Errors : 0x0
Board Management Controller, MAX10 NIOS FW version D.2.1.24
Board Management Controller, MAX10 Build version D.2.0.7
//****** PHY ******//
Object Id : 0xF100000
PCIe s:b:d.f : 0000:3f:00.0
Device Id : 0x0b30
Numa Node : 0
Ports Num : 01
Bitstream Id : 0x23000410010310
Bitstream Version : 0.2.3
Pr Interface Id : a5d72a3c-c8b0-4939-912c-f715e5dc10ca
//****** PHY GROUP 0 ******//
Direction : Line side
Speed : 25 Gbps
Number of PHYs : 4
//****** PHY GROUP 1 ******//
Direction : Host side
Speed : 40 Gbps
Number of PHYs : 4
//****** Intel C827 Retimer ******//
Port0 25G : Up
Port1 25G : Up
Port2 25G : Down
Port3 25G : Down
Retimer A Version : 101c.1064
Retimer B Version : 101c.1064
Board Management Controller, MAX10 NIOS FW version D.2.1.24
Board Management Controller, MAX10 Build version D.2.0.7
//****** MAC ******//
Object Id : 0xF100000
PCIe s:b:d.f : 0000:3f:00.0
Device Id : 0x0b30
Numa Node : 0
Ports Num : 01
Bitstream Id : 0x23000410010310
Bitstream Version : 0.2.3
Pr Interface Id : a5d72a3c-c8b0-4939-912c-f715e5dc10ca
Number of MACs : 8
MAC address 0 : 64:4C:36:12:9D:D0
MAC address 1 : 64:4C:36:12:9D:D1
MAC address 2 : 64:4C:36:12:9D:D2
MAC address 3 : 64:4C:36:12:9D:D3
MAC address 4 : 64:4C:36:12:9D:D4
MAC address 5 : 64:4C:36:12:9D:D5
MAC address 6 : 64:4C:36:12:9D:D6
MAC address 7 : 64:4C:36:12:9D:D7
Running mode: nlb
Running fpgadiag lpbk1 vh0-vh0 test...
found the NLB offset=0x28000
Cachelines Read_Count Write_Count Cache_Rd_Hit Cache_Wr_Hit Cache_Rd_Miss Cache_Wr_Miss Eviction 'Clocks(@200 MHz)' Rd_Bandwidth Wr_Bandwidth
1024 97702252 97701372 0 0 0 0 0 200032256 6.252 GB/s 6.252 GB/s
VH0_Rd_Count VH0_Wr_Count VH1_Rd_Count VH1_Wr_Count VL0_Rd_Count VL0_Wr_Count
97702252 97701373 0 0 0 0
Running fpgadiag lpbk1 vh0-vh1 test...
found the NLB offset=0x28000
Cachelines Read_Count Write_Count Cache_Rd_Hit Cache_Wr_Hit Cache_Rd_Miss Cache_Wr_Miss Eviction 'Clocks(@200 MHz)' Rd_Bandwidth Wr_Bandwidth
1024 97707972 97707108 0 0 0 0 0 200032174 6.252 GB/s 6.252 GB/s
VH0_Rd_Count VH0_Wr_Count VH1_Rd_Count VH1_Wr_Count VL0_Rd_Count VL0_Wr_Count
97707972 97707109 0 0 0 0
Running fpgadiag lpbk1 vh1-vh0 test...
found the NLB offset=0x28000
Cachelines Read_Count Write_Count Cache_Rd_Hit Cache_Wr_Hit Cache_Rd_Miss Cache_Wr_Miss Eviction 'Clocks(@200 MHz)' Rd_Bandwidth Wr_Bandwidth
1024 97738752 97737964 0 0 0 0 0 200031550 6.254 GB/s 6.254 GB/s
VH0_Rd_Count VH0_Wr_Count VH1_Rd_Count VH1_Wr_Count VL0_Rd_Count VL0_Wr_Count
97738752 97737965 0 0 0 0
Running fpgadiag lpbk1 vh1-vh1 test...
found the NLB offset=0x28000
Cachelines Read_Count Write_Count Cache_Rd_Hit Cache_Wr_Hit Cache_Rd_Miss Cache_Wr_Miss Eviction 'Clocks(@200 MHz)' Rd_Bandwidth Wr_Bandwidth
1024 97721588 97720760 0 0 0 0 0 200031448 6.253 GB/s 6.253 GB/s
VH0_Rd_Count VH0_Wr_Count VH1_Rd_Count VH1_Wr_Count VL0_Rd_Count VL0_Wr_Count
97721588 97720761 0 0 0 0
Finished Executing NLB (FPGA DIAG) Tests
Running mode: dma_afu
Running fpga_dma_test test on DDR4_A...
Running test in HW mode
Buffer Verification Success!
Buffer Verification Success!
Running DDR sweep test
Buffer pointer = 0x7fce887fc000, size = 0x100000000 (0x7fce887fc000 through 0x7fcf887fc000)
Allocated test buffer
Fill test buffer
DDR Sweep Host to FPGA
Measured bandwidth = 5600.550050 Megabytes/sec
Clear buffer
DDR Sweep FPGA to Host
Measured bandwidth = 5592.111580 Megabytes/sec
Verifying buffer..
Buffer Verification Success!
DDR sweep with unaligned pointer and size
Buffer pointer = 0x7fce891fd03d, size = 0xffffffbe (0x7fce891fd03d through 0x7fcf891fcffb)
Allocated test buffer
Fill test buffer
DDR Sweep Host to FPGA
Measured bandwidth = 5608.426199 Megabytes/sec
Clear buffer
DDR Sweep FPGA to Host
Measured bandwidth = 5523.782897 Megabytes/sec
Verifying buffer..
Buffer Verification Success!
Buffer pointer = 0x7fce891fd003, size = 0xfffffffd (0x7fce891fd003 through 0x7fcf891fd000)
Allocated test buffer
Fill test buffer
DDR Sweep Host to FPGA
Measured bandwidth = 5575.882161 Megabytes/sec
Clear buffer
DDR Sweep FPGA to Host
Measured bandwidth = 5496.642558 Megabytes/sec
Verifying buffer..
Buffer Verification Success!
Buffer pointer = 0x7fce891fd007, size = 0xfffffff6 (0x7fce891fd007 through 0x7fcf891fcffd)
Allocated test buffer
Fill test buffer
DDR Sweep Host to FPGA
Measured bandwidth = 5648.824812 Megabytes/sec
Clear buffer
DDR Sweep FPGA to Host
Measured bandwidth = 5521.200156 Megabytes/sec
Verifying buffer..
Buffer Verification Success!
Buffer pointer = 0x7fce891fd000, size = 0xfffffffd (0x7fce891fd000 through 0x7fcf891fcffd)
Allocated test buffer
Fill test buffer
DDR Sweep Host to FPGA
Measured bandwidth = 5609.697316 Megabytes/sec
Clear buffer
DDR Sweep FPGA to Host
Measured bandwidth = 5630.765624 Megabytes/sec
Verifying buffer..
Buffer Verification Success!
Buffer pointer = 0x7fce891fd000, size = 0xffffffc3 (0x7fce891fd000 through 0x7fcf891fcfc3)
Allocated test buffer
Fill test buffer
DDR Sweep Host to FPGA
Measured bandwidth = 5612.841992 Megabytes/sec
Clear buffer
DDR Sweep FPGA to Host
Measured bandwidth = 5586.903681 Megabytes/sec
Verifying buffer..
Buffer Verification Success!
Buffer pointer = 0x7fce891fd000, size = 0xfffffff9 (0x7fce891fd000 through 0x7fcf891fcff9)
Allocated test buffer
Fill test buffer
DDR Sweep Host to FPGA
Measured bandwidth = 5651.709522 Megabytes/sec
Clear buffer
DDR Sweep FPGA to Host
Measured bandwidth = 5633.353851 Megabytes/sec
Verifying buffer..
Buffer Verification Success!
Running fpga_dma_test test on DDR4_B...
Running test in HW mode
Buffer Verification Success!
Buffer Verification Success!
Running DDR sweep test
Buffer pointer = 0x7f17d3bfc000, size = 0x100000000 (0x7f17d3bfc000 through 0x7f18d3bfc000)
Allocated test buffer
Fill test buffer
DDR Sweep Host to FPGA
Measured bandwidth = 5612.720106 Megabytes/sec
Clear buffer
DDR Sweep FPGA to Host
Measured bandwidth = 5694.609999 Megabytes/sec
Verifying buffer..
Buffer Verification Success!
DDR sweep with unaligned pointer and size
Buffer pointer = 0x7f17d45fd03d, size = 0xffffffbe (0x7f17d45fd03d through 0x7f18d45fcffb)
Allocated test buffer
Fill test buffer
DDR Sweep Host to FPGA
Measured bandwidth = 5606.467502 Megabytes/sec
Clear buffer
DDR Sweep FPGA to Host
Measured bandwidth = 5648.229561 Megabytes/sec
Verifying buffer..
Buffer Verification Success!
Buffer pointer = 0x7f17d45fd003, size = 0xfffffffd (0x7f17d45fd003 through 0x7f18d45fd000)
Allocated test buffer
Fill test buffer
DDR Sweep Host to FPGA
Measured bandwidth = 5615.607668 Megabytes/sec
Clear buffer
DDR Sweep FPGA to Host
Measured bandwidth = 5612.448868 Megabytes/sec
Verifying buffer..
Buffer Verification Success!
Buffer pointer = 0x7f17d45fd007, size = 0xfffffff6 (0x7f17d45fd007 through 0x7f18d45fcffd)
Allocated test buffer
Fill test buffer
DDR Sweep Host to FPGA
Measured bandwidth = 5649.737109 Megabytes/sec
Clear buffer
DDR Sweep FPGA to Host
Measured bandwidth = 5672.415577 Megabytes/sec
Verifying buffer..
Buffer Verification Success!
Buffer pointer = 0x7f17d45fd000, size = 0xfffffffd (0x7f17d45fd000 through 0x7f18d45fcffd)
Allocated test buffer
Fill test buffer
DDR Sweep Host to FPGA
Measured bandwidth = 5624.444398 Megabytes/sec
Clear buffer
DDR Sweep FPGA to Host
Measured bandwidth = 5618.423113 Megabytes/sec
Verifying buffer..
Buffer Verification Success!
Buffer pointer = 0x7f17d45fd000, size = 0xffffffc3 (0x7f17d45fd000 through 0x7f18d45fcfc3)
Allocated test buffer
Fill test buffer
DDR Sweep Host to FPGA
Measured bandwidth = 5622.371837 Megabytes/sec
Clear buffer
DDR Sweep FPGA to Host
Measured bandwidth = 5659.481637 Megabytes/sec
Verifying buffer..
Buffer Verification Success!
Buffer pointer = 0x7f17d45fd000, size = 0xfffffff9 (0x7f17d45fd000 through 0x7f18d45fcff9)
Allocated test buffer
Fill test buffer
DDR Sweep Host to FPGA
Measured bandwidth = 5606.902116 Megabytes/sec
Clear buffer
DDR Sweep FPGA to Host
Measured bandwidth = 5660.070136 Megabytes/sec
Verifying buffer..
Buffer Verification Success!
Running fpga_dma_test test on DDR4_C...
Running test in HW mode
Buffer Verification Success!
Buffer Verification Success!
Running DDR sweep test
Buffer pointer = 0x7ff68effc000, size = 0x40000000 (0x7ff68effc000 through 0x7ff6ceffc000)
Allocated test buffer
Fill test buffer
DDR Sweep Host to FPGA
Measured bandwidth = 2358.764387 Megabytes/sec
Clear buffer
DDR Sweep FPGA to Host
Measured bandwidth = 2439.997796 Megabytes/sec
Verifying buffer..
Buffer Verification Success!
DDR sweep with unaligned pointer and size
Buffer pointer = 0x7ff68f9fd03d, size = 0x3fffffbe (0x7ff68f9fd03d through 0x7ff6cf9fcffb)
Allocated test buffer
Fill test buffer
DDR Sweep Host to FPGA
Measured bandwidth = 2358.690375 Megabytes/sec
Clear buffer
DDR Sweep FPGA to Host
Measured bandwidth = 2439.482419 Megabytes/sec
Verifying buffer..
Buffer Verification Success!
Buffer pointer = 0x7ff68f9fd003, size = 0x3ffffffd (0x7ff68f9fd003 through 0x7ff6cf9fd000)
Allocated test buffer
Fill test buffer
DDR Sweep Host to FPGA
Measured bandwidth = 2358.861401 Megabytes/sec
Clear buffer
DDR Sweep FPGA to Host
Measured bandwidth = 2439.375992 Megabytes/sec
Verifying buffer..
Buffer Verification Success!
Buffer pointer = 0x7ff68f9fd007, size = 0x3ffffff6 (0x7ff68f9fd007 through 0x7ff6cf9fcffd)
Allocated test buffer
Fill test buffer
DDR Sweep Host to FPGA
Measured bandwidth = 2359.751621 Megabytes/sec
Clear buffer
DDR Sweep FPGA to Host
Measured bandwidth = 2438.391193 Megabytes/sec
Verifying buffer..
Buffer Verification Success!
Buffer pointer = 0x7ff68f9fd000, size = 0x3ffffffd (0x7ff68f9fd000 through 0x7ff6cf9fcffd)
Allocated test buffer
Fill test buffer
DDR Sweep Host to FPGA
Measured bandwidth = 2350.635176 Megabytes/sec
Clear buffer
DDR Sweep FPGA to Host
Measured bandwidth = 2440.036198 Megabytes/sec
Verifying buffer..
Buffer Verification Success!
Buffer pointer = 0x7ff68f9fd000, size = 0x3fffffc3 (0x7ff68f9fd000 through 0x7ff6cf9fcfc3)
Allocated test buffer
Fill test buffer
DDR Sweep Host to FPGA
Measured bandwidth = 2353.521378 Megabytes/sec
Clear buffer
DDR Sweep FPGA to Host
Measured bandwidth = 2439.492240 Megabytes/sec
Verifying buffer..
Buffer Verification Success!
Buffer pointer = 0x7ff68f9fd000, size = 0x3ffffff9 (0x7ff68f9fd000 through 0x7ff6cf9fcff9)
Allocated test buffer
Fill test buffer
DDR Sweep Host to FPGA
Measured bandwidth = 2350.056518 Megabytes/sec
Clear buffer
DDR Sweep FPGA to Host
Measured bandwidth = 2439.847035 Megabytes/sec
Verifying buffer..
Buffer Verification Success!
Running fpga_dma_test test on QDR...
Running test in HW mode
Buffer Verification Success!
Buffer Verification Success!
Running DDR sweep test
Buffer pointer = 0x7f80ee3fc000, size = 0x1000000 (0x7f80ee3fc000 through 0x7f80ef3fc000)
Allocated test buffer
Fill test buffer
DDR Sweep Host to FPGA
Measured bandwidth = 932.759871 Megabytes/sec
Clear buffer
DDR Sweep FPGA to Host
Measured bandwidth = 917.245179 Megabytes/sec
Verifying buffer..
Buffer Verification Success!
Finished Executing DMA Tests
Built-in Self-Test Completed.