DSP Builder for Intel® FPGAs (Advanced Blockset): Handbook

ID 683337
Date 6/20/2022
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15.2.3. Reorder and Rescale (ReorderAndRescale)

The ReorderAndRescale block is a modified version of the Reorder block that performs dynamic rescaling in addition to reordering, so it produces its output in block floating-point format.

The scaling operation first calculates the minimum number of duplicated sign bits across all data outputs of a DFT. These duplicated MSBs can be dropped without any loss of information. Then the block drops LSBs, if required, to achieve the requested width of the output (Output Width parameter).

Table 97.   ReorderAndRescale Block Signals
Port Name Direction Description
v Input

Indicates if the input data is valid. Assert this Boolean signal when input data is valid.

Connect v output of the preceding DFT to this input.

cmd Input

An encoding of the size of the current DFT. For dynamic DFT/IDFTs, an extra MSB indicates whether to calculate a DFT (0) or an IDFT (1).

When all 53 sizes are supported, in DFT-only mode, a 6-bit integer encodes the size of the DFT currently input. In dynamic DFT/IDFT-mode, it is a 7-bit integer. The bottom 6 bits encode the size of the current DFT/IDFT, the MSB signifies whether to calculate a DFT or an IDFT.

Specify the size of the DFT by specifying the zero-based index of the required size in the FFT Size Table vector. For example, where the FFT Size Table is [12 24 36], 0 specifies size 12 and 1 specifies size 24.

Connect the cmd output of the preceding DFT to this input.

sop Input

A start-of-packet Boolean signal that pulses high on the first (and only the first) valid input of an DFT/IDFT.

The generated RTL requires at least one cycle gap between the reset deasserting and the first sop signal.

Connect the sop output of the preceding DFT to this input.

pos Input

Indicates the natural order position of the current input. Writing each sample to memory at location pos means the memory containing the samples in natural order.

Connect the pos output of the preceding DFT to this input.

data Input

A complex input data signal.

Connect data output of the preceding DFT to this input.

v Output Indicates that the output data is valid. This Boolean signal is asserted for valid output data.
cmd Output

An encoding of the size of the current DFT. In DFT/IDFT dynamic mode, an extra MSB indicates whether the current output is a DFT (0) or an IDFT (1).

When all 53 sizes are supported, cmd is a 6-bit signal with the size of the current DFT. In dynamic DFT/IDFT mode cmd is a 7-bit signal with the current DFT/iDFT size and status of the DFT/IDFT.

The DFT specifies the size of the DFT by specifying the zero-based index of the required size in the Size Table parameter. For example, where Size Table is [12 24 36], 0 specifies size 12 and 1 specifies size 24.

sop Output A start-of-packet Boolean signal that pulses high on the first (and only the first) valid output of a DFT/IDFT.
data Output

A complex output data signal, which is the reordered and rescaled data.

The output data width is specified by the Output Width parameter and it has the same number of fractional bits as the input type (Input Type parameter).

shift Output

The rescaling factor.

The shift output is constant for each DFT processed but varies between DFTs.

For the ReorderAndRescale block, data × 2 shift is approximately equal (within rounding error) to datafor the Reorder block.

Table 98.   ReorderAndRescale Parameters
Parameter Description
Size Table

Specify the list of DFT sizes to support, in the form of a MATLAB vector. For example, [12 24 36].

Allowed sizes are specified in the DFT Block Supported Sizes table.

This vector must match the FFT Size Table specification of the preceding DFT.

Input Type

Specify the fixed-point input type of the ReorderAndRescale block. The value must be the same as the output type of the preceding DFT block.

For example, fixdt(0,29,15)

Output Width

Specify the requested (integer and fractional) width of rescaled data output.

The output type has the same number of fractional bits as the Input Type.