DSP Builder for Intel® FPGAs (Advanced Blockset): Handbook

ID 683337
Date 6/20/2022
Public

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15.4.29. Floating-point Multiply Accumulate (MultAcc)

The MultAcc block instantiates a DSP block in multiply-accumulate mode. This block only works on any device with a floating-point DSP block and supports a hardware single-precision multiply accumulate structure. The block latency is 4 cycles.
Table 199.  Parameters for the MultAcc Block
Parameter Description
Output data type mode Determines how the block sets its output data type:
  • Inherit via internal rule: the number of integer and fractional bits is the maximum of the number of bits in the input data types.
  • Specify via dialog: you can set the output type of the block explicitly using additional fields that are available when this option is selected. This option reinterprets the output bit pattern from the LSB up according to the specified type.
  • Boolean: the output type is Boolean.
Function Accumulate (fpAcc) or multiply accumulate (fpMultAcc). When you select fpMultAcc, the block flushes denormalized numbers to zero on inputs and output; when you select fpAcc, the block flushes subnormal numbers to zero on inputs and output.

The fpMultAcc function implements the following equation:

qn = (acc & q(n-1)) + x * y

  • When acc is high (1) the result is equal to the sum between the previous accumulated result and the product x*y.
  • When acc is low (0) the output value is the product value x*y

The fpAcc function implements the following equation:

qn = (acc & q(n-1)) + x

  • When acc is high the result consists of the sum between the previous accumulated result and the input x.
  • When acc is low the x input is forwarded to the output q.
  • Subnormal numbers are flushed to zero on inputs and output
    Table 200.  Port Interface for the MultAcc Block
    Signal Direction Vector Data Support Complex Data Support Description
    x Input
    y Input Multiply accumulate only. Tied to 1 for the accumulate parameter.
    acc Input
    q Output