Arria® 10 Device Overview

ID 683332
Date 2/14/2022
Public
Document Table of Contents

Package Plan

Table 13.  Package Plan for Intel® Arria® 10 SX Devices (U19, F27, F29, and F34)Refer to I/O and High Speed I/O in Intel® Arria® 10 Devices chapter for the number of 3 V I/O, LVDS I/O, and LVDS channels in each device package.

Product Line

U19

(19 mm × 19 mm, 484-pin UBGA)

F27

(27 mm × 27 mm, 672-pin FBGA)

F29

(29 mm × 29 mm, 780-pin FBGA)

F34

(35 mm × 35 mm, 1152-pin FBGA)

3 V I/O LVDS I/O XCVR 3 V I/O LVDS I/O XCVR 3 V I/O LVDS I/O XCVR 3 V I/O LVDS I/O XCVR
SX 160 48 144 6 48 192 12 48 240 12
SX 220 48 144 6 48 192 12 48 240 12
SX 270 48 192 12 48 312 12 48 336 24
SX 320 48 192 12 48 312 12 48 336 24
SX 480 48 312 12 48 444 24
SX 570 48 444 24
SX 660 48 444 24
Table 14.  Package Plan for Intel® Arria® 10 SX Devices (F35, KF40, and NF40)Refer to I/O and High Speed I/O in Intel® Arria® 10 Devices chapter for the number of 3 V I/O, LVDS I/O, and LVDS channels in each device package.

Product Line

F35

(35 mm × 35 mm, 1152-pin FBGA)

KF40

(40 mm × 40 mm, 1517-pin FBGA)

NF40

(40 mm × 40 mm, 1517-pin FBGA)

3 V I/O LVDS I/O XCVR 3 V I/O LVDS I/O XCVR 3 V I/O LVDS I/O XCVR
SX 270 48 336 24
SX 320 48 336 24
SX 480 48 348 36
SX 570 48 348 36 96 600 36 48 540 48
SX 660 48 348 36 96 600 36 48 540 48