External Memory Interfaces Intel® Agilex™ FPGA IP User Guide

ID 683216
Date 11/03/2022
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

4.1.1.10. afi_clk for DDR4

AFI clock interface
Table 23.  Interface: afi_clkInterface type: Clock Output
Port Name Direction Description
afi_clk Output Clock for the Altera PHY Interface (AFI)